MAP - Department of Computer Science 12

Multi-core Architectures and Programming

Multi-core processors offer a high theoretical computation performance and therefore open up new fascinating possibilities in scientific and other domains, like multimedia, medicine and finance. In order to fully exploit the performance, an efficient mapping of algorithms to the architecture of the respective multi-core processor has to be determined. Compared to traditional single-core processors, a radical rethinking of programming methodologies needs to be undertaken. Our aims are to gain new insights into modern multi-core architectures and the corresponding programming paradigms in order to exploit the platform and to make it easier to map algorithms to the platform. As platforms, we focus in particular on graphics cards from NVIDIA (e.g. Tesla based systems), on systems based on the Cell Processor (e.g. Sony’s PLAYSTATION 3). However, we look also for new architectures like Tilera’s TILEPro64 and Intel’s Many Integrated Core (MIC).

Bild einer Collage von unterschiedlichen Mehr- und Vielkernarchitektursystemen

Mashup of different Multi- and Many Core Architectures

Publications

2019

Membarth R., Dutta H., Hannig F., Teich J.:
Efficient Mapping of Streaming Applications for Image Processing on Graphics Cards
In: Transactions on High-Performance Embedded Architectures and Compilers V, Springer, 2019, p. 1-20 (Lecture Notes in Computer Science (LNCS), Vol.11225)
ISBN: 978-3-662-58833-8
DOI: 10.1007/978-3-662-58834-5_1
BibTeX: Download

2018

Fickenscher J., Hannig F., Teich J., Bouzouraa ME.:
Base Algorithms of Environment Maps and Efficient Occupancy Grid Mapping on Embedded GPUs
4th International Conference on Vehicle Technology and Intelligent Transport Systems (VEHITS) (Funchal, Madeira, Portugal, 16. March 2018 - 18. March 2018)
DOI: 10.5220/0006677302980306
BibTeX: Download
Fickenscher J., Schlumberger J., Hannig F., Bouzouraa ME., Teich J.:
Cell-based Update Algorithm for Occupancy Grid Maps and new Hybrid Map for ADAS on Embedded GPUs
Design, Automation and Test in Europe (DATE) (Dresden, Germany, 19. March 2018 - 23. March 2018)
DOI: 10.23919/DATE.2018.8342050
BibTeX: Download

2017

Fickenscher J., Bouzouraa ME., Hannig F., Teich J.:
Environment Mapping Using Massively Parallel Architectures
Vehicle Intelligence (München, 5. December 2017 - 7. December 2017)
BibTeX: Download
Fickenscher J., Reinhart S., Bouzouraa ME., Hannig F., Teich J.:
Convoy Tracking for ADAS on Embedded GPUs
Intelligent Vehicles Symposium (IV 2017) (Redondo Beach, CA, USA, 11. June 2017 - 14. June 2017)
BibTeX: Download

2016

Fickenscher J., Reiche O., Schlumberger J., Hannig F., Teich J.:
Modeling, Programming and Performance Analysis of Automotive Environment Map Representations on Embedded GPUs
18th IEEE International High-Level Design Validation and Test Workshop (HLDVT) (Santa Cruz, CA, 7. October 2016 - 8. October 2016)
In: Proceedings of the 18th IEEE International High-Level Design Validation and Test Workshop (HLDVT) 2016
DOI: 10.1109/HLDVT.2016.7748257
BibTeX: Download

2013

Membarth R.:
Code Generation for GPU Accelerators from a Domain-Specific Language for Medical Imaging (Dissertation, 2013)
BibTeX: Download

2012

Membarth R., Hannig F., Teich J., Körner M., Eckert W.:
Automatic Optimization of In-Flight Memory Transactions for GPU Accelerators based on a Domain-Specific Language for Medical Imaging
11th International Symposium on Parallel and Distributed Computing (ISPDC) (Munich, 25. June 2012 - 29. June 2012)
In: Proc. of the 11th International Symposium on Parallel and Distributed Computing (ISPDC), New York, NY, USA: 2012
DOI: 10.1109/ISPDC.2012.36
BibTeX: Download
Membarth R., Hannig F., Teich J., Körner M., Eckert W.:
Generating Device-specific GPU Code for Local Operators in Medical Imaging
26th IEEE International Parallel and Distributed Processing Symposium (IPDPS) (Shanghai, 21. May 2012 - 25. May 2012)
In: Proc. of the 26th IEEE International Parallel and Distributed Processing Symposium (IPDPS), New York, NY, USA: 2012
DOI: 10.1109/IPDPS.2012.59
BibTeX: Download
Membarth R., Hannig F., Teich J., Körner M., Eckert W.:
Mastering Software Variant Explosion for GPU Accelerators
In: Proceedings of the 10th International Workshop on Algorithms, Models and Tools for Parallel Computing on Heterogeneous Platforms (HeteroPar), Berlin; Heidelberg: Springer, 2012, p. 123-132 (Lecture Notes on Computer Science (LNCS))
DOI: 10.1007/978-3-642-36949-0_15
BibTeX: Download
Membarth R., Hannig F., Teich J., Köstler H.:
Towards Domain-specific Computing for Stencil Codes in HPC
2nd International Workshop on Domain-Specific Languages and High-Level Frameworks for High Performance Computing (WOLFHPC) (Salt Lake City, UT, 10. November 2012 - 16. November 2012)
In: Proceedings of the 2nd International Workshop on Domain-Specific Languages and High-Level Frameworks for High Performance Computing (WOLFHPC) 2012
DOI: 10.1109/SC.Companion.2012.136
BibTeX: Download
Membarth R., Lupp JH., Hannig F., Teich J., Körner M., Eckert W.:
Dynamic Task-Scheduling and Resource Management for GPU Accelerators in Medical Imaging
25th International Conference on Architecture of Computing Systems (ARCS) (Munich, 28. February 2012 - 2. March 2012)
In: Proc. of the 25th International Conference on Architecture of Computing Systems (ARCS), New York, NY, USA: 2012
DOI: 10.1007/978-3-642-28293-5_13
BibTeX: Download

2011

Kouveli G., Hannig F., Lupp JH., Teich J.:
Towards Resource-Aware Programming on Intel's Single-Chip Cloud Computer Processor
3rd Many-core Applications Research Community (MARC) Symposium (Ettlingen, 5. July 2011 - 6. July 2011)
In: Proceedings of the 3rd MARC Symposium, Karlsruhe, Germany: 2011
DOI: 10.5445/KSP/1000023937
BibTeX: Download
Marwedel P., Teich J., Kouveli G., Bacivarov I., Thiele L., Ha S., Lee C., Xu Q., Huang L.:
Mapping of Applications to MPSoCs
9th International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS'11) (Taipei, 9. October 2011 - 14. October 2011)
In: Proceedings of the 9th International Conference on Hardware/Software Codesign and System Synthesis, part of ESWeek'11, New York, NY, USA: 2011
DOI: 10.1145/2039370.2039390
BibTeX: Download
Membarth R., Hannig F., Teich J., Körner M., Eckert W.:
Frameworks for Multi-core Architectures: A Comprehensive Evaluation using 2D/3D Image Registration
24th International Conference on Architecture of Computing Systems (ARCS) (Lake Como, 24. February 2011 - 25. February 2011)
In: Proceedings of the 24th International Conference on Architecture of Computing Systems (ARCS), Heidelberg: 2011
DOI: 10.1007/978-3-642-19137-4_6
BibTeX: Download
Membarth R., Hannig F., Teich J., Körner M., Eckert W.:
Frameworks for GPU Accelerators: A Comprehensive Evaluation using 2D/3D Image Registration
9th IEEE Symposium on Application Specific Processors (SASP) (San Diego, CA, USA, 5. June 2011 - 6. June 2011)
In: Proceedings of the 9th IEEE Symposium on Application Specific Processors (SASP) 2011
DOI: 10.1109/SASP.2011.5941083
BibTeX: Download
Membarth R., Hannig F., Teich J., Litz G., Hornegger H.:
Detector Defect Correction of Medical Images on Graphics Processors
SPIE: Medical Imaging : Image Processing (Lake Buena Vista, Orlando, FL, 14. February 2011 - 16. February 2011)
In: Proceedings of the SPIE: Medical Imaging 2011: Image Processing 2011
DOI: 10.1117/12.877656
BibTeX: Download
Membarth R., Lokhmotov A., Teich J.:
Generating GPU Code from a High-level Representation for Image Processing Kernels
5th Workshop on Highly Parallel Processing on a Chip (HPPC) (Bordeaux)
In: Proceedings of the 5th Workshop on Highly Parallel Processing on a Chip (HPPC) 2011
BibTeX: Download

2010

Membarth R., Hannig F., Teich J., Körner M., Eckert W.:
Comparison of Parallelization Frameworks for Shared Memory Multi-Core Architectures
Embedded World Conference (Nuremberg, 3. March 2010 - 5. March 2010)
In: Proc. Embedded World Conference 2010
BibTeX: Download

2009

Membarth R., Hannig F., Dutta H., Teich J.:
Efficient Mapping of Multiresolution Image Filtering Algorithms on Graphics Processors
9th International Workshop on Systems, Architectures, Modeling, and Simulation (SAMOS Workshop) (Island of Samos, 20. July 2009 - 23. July 2009)
In: Proceedings of the 9th International Workshop on Systems, Architectures,Modeling, and Simulation (SAMOS), Berlin / Heidelberg: 2009
DOI: 10.1007/978-3-642-03138-0_31
BibTeX: Download
Membarth R., Hannig F., Dutta H., Teich J.:
Optimization Flow for Algorithm Mapping on Graphics Cards
Advanced Computer Architecture and Compilation for Embedded Systems (ACACES) (Barcelona, 12. July 2009 - 18. July 2009)
In: Proceedings of ACACES 2009 Poster Abstracts: Advanced Computer Architecture and Compilation for Embedded Systems 2009
BibTeX: Download
Membarth R., Kutzer P., Dutta H., Hannig F., Teich J.:
Acceleration of multiresolution imaging algorithms: A comparative study
2009 20th IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2009 (Boston, MA, 7. July 2009 - 9. July 2009)
In: Proceedings of the 20th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) 2009
DOI: 10.1109/ASAP.2009.8
BibTeX: Download