AEOS - Department of Computer Science 12

Aktororientierte Synthese und Optimierung digitaler Hardware/Software-Systeme auf Systemebene

This project is focused on new approaches to optimally synthesize behavioral models targeting heterogeneous Multi-Processor-Systems-on-a-Chip implementations. This also includes novel hardware synthesis and software synthesis methodologies as well as synthesis approaches across hardware/software boundaries.

Publications

Falk J., Schwarzer T., Glaß M., Teich J., Zebelein C., Haubelt C.:
Quasi-static scheduling of data flow graphs in the presence of limited channel capacities
13th IEEE Symposium on Embedded Systems for Real-Time Multimedia, ESTIMedia 2015
DOI: 10.1109/ESTIMedia.2015.7351766
BibTeX: Download
Falk J.:
A Clustering-Based MPSoC Design Flow for Data Flow-Oriented Applications (Dissertation, 2015)
DOI: 10.13140/RG.2.1.5029.5763
BibTeX: Download
Schwarzer T., Falk J., Glaß M., Teich J., Zebelein C., Haubelt C.:
Throughput-optimizing compilation of dataflow applications for multi-cores using quasi-static scheduling
18th International Workshop on Software and Compilers for Embedded Systems, SCOPES 2015 (St. Goar)
In: Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems (SCOPES) 2015
DOI: 10.1145/2764967.2764972
BibTeX: Download
Zebelein C., Haubelt C., Falk J., Schwarzer T., Teich J.:
Representing mapping and scheduling decisions within dataflow graphs
2013 16th Forum on Specification and Design Languages, FDL 2013 (Paris, 24. September 2013 - 26. September 2013)
In: Proceedings of Forum on Specification & Design Languages (FDL 2013) 2013
URL: https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=84891286674&origin=inward
BibTeX: Download